This archive contains material created or accumulated by Peter J W Noble MBE during his career as an Electronic Engineer and Physicist working for Associated Electrical Industries Ltd and the Plessey Company Ltd. Some items dated from 1968 onwards cover Noble's time as Managing Director of Integrated Photomatrix Ltd. The archive reflects the research and processes which led to the creation of the solid-state image sensor, now known as the 'active pixel' image sensor. It contains research papers, reports and patents (1959-c1975), journals and newspapers (1961-1974), company information sheets and technical details (1970-1974), photographs of chips, components and received awards (c1966 - 1974) and a typed history written by Noble which summarises his work and career (2018) The Peter J W Noble Active Pixel Archive
Research papers and reports produced by Plessey Company Ltd or by individuals working on behalf of Plessey Company Ltd Research Papers and Reports produced by Plessey Company Ltd
A series of journals, photocopy journal excerpts and journal reprints containing articles written by Peter J W Noble between 1962-1970, some of which were written during his time working at Associated Electrical Industries Ltd and Plessey Company Ltd Journals and Journal Excerpts with articles by Peter J W Noble
A series of typescript and manuscript research papers and reports produced solely by Peter J W Noble or in conjunction with other individuals during Noble's employment at Associated Electrical Industries Ltd (AEI) and Plessey Company Ltd. The series also includes some papers and reports used by Noble for research purposes and two patent specifications produced whilst at Associated Electrical Industries Ltd; one authored by James Dyson and one by Noble and James Dyson Research Papers, Reports and Patents
A selection of company information sheets and technical data forms produced by the Plessey Company Ltd, Reticon Corporation, Fairchild Semiconductor and Integrated Photomatrix Ltd Company Information Sheets and Technical Details
A series of journals, photocopy journal excerpts and journal reprints containing articles written by Peter J W Noble or used by Peter J W Noble for research purposes. Also includes artitcles written by or on behalf of Associated Electrical Industries Ltd. Journals include 'Component Technology', 'Electronics and Communications', 'Microelectronics', ‘IEEE Transactions on Electronic Devices’, ‘IEEE Journal of Solid-State Circuits’, 'Proceedings of the IEEE', 'The Radio and Electronic Engineer' and 'Electronics.' Also contains newspaper cuttings and industry newspapers reporting the activities of the Plessey Company Ltd or containing articles written by Peter J W Noble. One cutting from an unknown newspaper shows a photograph of Integrated Photomatrix Ltd receiving the Queen's Award for Technology in 1974 Journals and Newspapers
A series of photographs showing Integrated Photomatrix Ltd receiving the Queen's Award for Technology in 1974 (photographer Evan Jones), plus a variety of chips and circuits produced by Peter J W Noble and team whilst working at the Plessey Company Ltd Photographs
Typescript annual research report covering the dates November 1967 - October 1968, outlining a study for developing arrays of photosensitive detectors with integral scanning on a silicon substrate. The report shows that a 100 x 100 photodiode detector is practicable and, with cooling, radiation could be detected. An analysis for the photodiode sensitivity is given. Produced by Plessey Company Ltd with P J W Noble written in ink in the top right corner Annual research report: "Solid State Imaging at Low Light Levels"
Photocopy of an article from 'Electronics and Communications' written by Peter Noble on behalf of the Plessey Company Ltd Photocopy journal article: "Photodiodes in integrated circuits have integrating and logic applications" by Peter J W Noble
Photocopy typescript paper with minor annotations produced by Sir Derek Harry Roberts on behalf of Plessey Company Ltd "Silicon Device Technology: Invited Paper to be given at Conference on Solid State Devices, Manchester, September 1967" by D H Roberts
A black and white photograph of a solid state image detector with 100 pixels sitting within its encapsulation. The centre area is the photocell array containing a 10 x 10 matrix with an array of MOST devices. Around the periphery of the chip is the scanning circuitry which is two ring counters and around the outer edge is the encapsulation. The central array is 0.04 x 0.04 inches and the total chip is 0.1 x 0.1 inches Photograph showing a 10 x 10 array of pixels as a chip in its encapsulation
A black and white photograph showing three items used for an experiment. It contains a 16 diode experimental layout, a single MOS device used to check funcion and an experimental circuit Photograph of a 16 diode experimental circuit and MOS device labelled L17A
Typescript paper written by Peter J W Noble during his time working at the Allan Clark Research Centre at the Plessey Company Ltd. Noble presented the paper to the conference on Integrated Circuits held at Congress Theatre, Eastbourne, Sussex Conference paper on Integrated Circuits: "Light sensitive arrays based on photodiodes combined With MOS devices" by Peter J W Noble
Photocopy typescript of a paper presented to the British Scientific Instrument Research Association (SIRA) conference, Eastbourne, UK, by Peter J W Noble on behalf of Plessey Company Ltd. Includes diagrams of circuits "New Developments in Optics and Their Applications in Industry: Solid State Image Detectors" by Peter J W Noble
An internal typescript research report written by Peter J W Noble during his time working at the Allan Clark Research Centre at the Plessey Company Ltd. Includes additional bundle of figure drawings and diagrams "Self scanned silicon image detector arrays" by Peter J W Noble
Manuscript produced by Peter J W Noble during his time working at the Allan Clark Research Centre, Plessey Company Ltd. Contains the first ever hand drawn sketch of the first layout ideas for the MOS sensor, a linear array and an area array. This drawing shows the fundamental way of creating sensor arrays and shows the 'active pixel' for the first time "All Silica Systems" by Peter J W Noble
Part no 418/8/32625. Typescript advance information sheet with timing diagram and dimensions Plessey Semiconductors: "Type OPT 6 self-scanned linear detectors array of 72 elements"
A black and white photograph of a solid state image sensor with 100 pixels. The centre area is the photocell array containing a 10 x 10 matrix with an array of MOST devices. Around the periphery of the chip is the scanning circuitry which is two ring counters. The central array is 0.04 x 0.04 inches and the total chip is 0.1 x 0.1 inches Photograph showing a 10 x 10 array of pixels as a chip
A black and white photograph showing a 4 x 18 bit card reader consisting of a photodiode array with associated charging, sampling, encoding and storage circuitry. The chip is 0.1 inches square and is mounted in a conventional package with a transparent lid Photograph of a 4 x 18 card reading chip
Full issue of Volume 2, Number 3, published by the Plessey Company Ltd. Contains article "Development and Potential of Optoelectronics Techniques" by Peter J W Noble Journal: 'Component Technology'
A black and white photograph showing a six diode circuit used for checking diode function Photograph of a 6 diode circuit labelled L6A
